Function core::arch::riscv32::sfence_vma_asid
source · pub unsafe fn sfence_vma_asid(asid: usize)
🔬This is a nightly-only experimental API. (
riscv_ext_intrinsics
#114544)Available on RISC-V RV32 only.
Expand description
Supervisor memory management fence for given address space
The fence orders all reads and writes made to any level of the page tables,
but only for the address space identified by integer parameter asid
.
Accesses to global mappings are not ordered. The fence also invalidates all
address-translation cache entries matching the address space identified by integer
parameter asid
, except for entries containing global mappings.