#[non_exhaustive]#[repr(i32)]pub enum svprfop {
SV_PLDL1KEEP = 0,
SV_PLDL1STRM = 1,
SV_PLDL2KEEP = 2,
SV_PLDL2STRM = 3,
SV_PLDL3KEEP = 4,
SV_PLDL3STRM = 5,
SV_PSTL1KEEP = 8,
SV_PSTL1STRM = 9,
SV_PSTL2KEEP = 10,
SV_PSTL2STRM = 11,
SV_PSTL3KEEP = 12,
SV_PSTL3STRM = 13,
}stdarch_aarch64_sve #145052)Expand description
Addressing mode for prefetch intrinsics - allows the specification of the expected access kind (read or write), the cache level to load the data, the data retention policy (temporal or streaming)
Variants (Non-exhaustive)§
This enum is marked as non-exhaustive
SV_PLDL1KEEP = 0
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for reading to the L1 cache (i.e. allocate in cache normally)
SV_PLDL1STRM = 1
stdarch_aarch64_sve #145052)Streaming fetch of the addressed location for reading to the L1 cache (i.e. memory only used once)
SV_PLDL2KEEP = 2
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for reading to the L2 cache (i.e. allocate in cache normally)
SV_PLDL2STRM = 3
stdarch_aarch64_sve #145052)Streaming fetch of the addressed location for reading to the L2 cache (i.e. memory only used once)
SV_PLDL3KEEP = 4
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for reading to the L3 cache (i.e. allocate in cache normally)
SV_PLDL3STRM = 5
stdarch_aarch64_sve #145052)Streaming fetch of the addressed location for reading to the L3 cache (i.e. memory only used once)
SV_PSTL1KEEP = 8
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L1 cache (i.e. allocate in cache normally)
SV_PSTL1STRM = 9
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L1 cache (i.e. memory only used once)
SV_PSTL2KEEP = 10
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L2 cache (i.e. allocate in cache normally)
SV_PSTL2STRM = 11
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L2 cache (i.e. memory only used once)
SV_PSTL3KEEP = 12
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L3 cache (i.e. allocate in cache normally)
SV_PSTL3STRM = 13
stdarch_aarch64_sve #145052)Temporal fetch of the addressed location for writing to the L3 cache (i.e. memory only used once)
Trait Implementations§
Source§impl Clone for svprfop
impl Clone for svprfop
Source§fn clone(&self) -> svprfop
fn clone(&self) -> svprfop
1.0.0 · Source§fn clone_from(&mut self, source: &Self)where
Self:,
fn clone_from(&mut self, source: &Self)where
Self:,
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