11. Armv7E-M bare-metal (soft-float)¶

Note

Currently the baseline target is qualified, without any specific -Ctarget-cpu or -Ctarget-feature flags mentioned in the rustc book.

Please contact support if your use case demands fully optimized builds for a specific CPU configuration.

The thumbv7em-none-eabi Ferrocene target provides support for bare-metal ARMv7E-M processors with the T32 ISA, using the soft-float ABI. This includes the Arm Cortex-M4 and Arm Cortex-M7.

On this target, functions accepting f32 or f64 will have those arguments packed into integer registers. For more information on the differences between the hard-float and soft-float ABIs, see the rustc book.

For the hard-float ABI, Armv7E-M bare-metal (hard-float) is also available.

11.1. Prerequisites¶

This target has no pre-requisites.

11.2. Archives to install¶

The following archives are needed when installing this target as a cross-compilation target:

rust-std-thumbv7em-none-eabi

11.3. Required compiler flags¶

To use the target, the following additional flags must be provided to rustc:

--target=thumbv7em-none-eabi

11.4. Testing Facade (Experimental)¶

Bare metal targets cannot use test harnesses that require libc. Instead, a testing facade that emulates the bare metal target can be used instead, but also provides access to std functionality.

The following additional archive is needed when installing:

rust-std-thumbv7em-ferrocene.facade-eabi

This target is the same as the one it proxies, except it includes a Linux libc, which means it can use std for testing and enriched interactive development on a Armv8-A Linux (glibc) or x86-64 Linux (glibc) host.

For more information, consult Testing Facades.