12. Armv7E-M bare-metal (hard-float)¶

Note

Currently the baseline target is qualified, without any specific -Ctarget-cpu or -Ctarget-feature flags mentioned in the rustc book.

Please contact support if your use case demands fully optimized builds for a specific CPU configuration, or double-precision FPU support.

The thumbv7em-none-eabihf Ferrocene target provides support for bare-metal ARMv7E-M processors with the T32 ISA, using the hard-float ABI with a single precision FPU. This includes the Arm Cortex-M4F and the single-precision variant of the Arm Cortex-M7F. The double-precision variant of the Arm Cortex-M7F is also supported but only single-precision operations will be executed on the FPU.

On this target, functions accepting f32 or f64 will have those arguments passed via FPU registers. For more information on the differences between the hard-float and soft-float ABIs, see the rustc book.

For the soft-float ABI, Armv7E-M bare-metal (soft-float) is also available.

12.1. Prerequisites¶

This target has no pre-requisites.

12.2. Archives to install¶

The following archives are needed when installing this target as a cross-compilation target:

rust-std-thumbv7em-none-eabihf

12.3. Required compiler flags¶

To use the target, the following additional flags must be provided to rustc:

--target=thumbv7em-none-eabihf

12.4. Testing Facade (Experimental)¶

Bare metal targets cannot use test harnesses that require libc. Instead, a testing facade that emulates the bare metal target can be used instead, but also provides access to std functionality.

The following additional archive is needed when installing:

rust-std-thumbv7em-ferrocene.facade-eabihf

This target is the same as the one it proxies, except it includes a Linux libc, which means it can use std for testing and enriched interactive development on a Armv8-A Linux (glibc) or x86-64 Linux (glibc) host.

For more information, consult Testing Facades.